I'm Navaneeth Singh, a computer science student focused on ML systems, LLM inference, GPU kernels, CPU runtimes, and model efficiency. I build low-level systems to understand where inference time and memory are actually spent — then optimize the bottlenecks.
GPU inference, CPU inference, and inference research — three views of the same problem: making model execution more efficient without treating the hardware as a black box.
High-performance LLM inference framework for TinyLlama-1.1B with fused Triton kernels, CUDA Graphs, speculative decoding, AVX2 token verification, NF4 quantization, LibTorch, and PyBind11. Performance improvements are reported per kernel and workload rather than as one global speedup.
CPU-native neural-network inference runtime designed for no-GPU machines. The current ResNet-18 path uses a compiled C++ runtime and hand-tuned AVX2 GEMM while preserving close agreement with PyTorch.
Empirical study of cache-budget truncation, H2O eviction, StreamingLLM, INT4/INT8 quantization, and sliding-window attention across multiple LLM architectures. Current work is scaling evaluation beyond the smaller-model validation stage.
My current research asks how KV-cache reduction strategies behave across architectures, especially when positional encoding and cache eviction interact in non-obvious ways.
I am comparing budget truncation, H2O token eviction, StreamingLLM, INT4/INT8 cache quantization, and sliding-window attention across OPT, IBM Granite, and Qwen2.5 model families. Smaller-parameter experiments have been used to validate the methodology; the next stage is larger-model evaluation to test whether the observed trends persist.
A large fraction of inference performance is governed by data movement, memory bandwidth, cache behavior, and execution overhead rather than arithmetic alone. That idea connects my GPU kernel work, CPU runtime work, and KV-cache research.
These projects show range across low-level libraries, backend systems, deep learning fundamentals, and WebAssembly. They are intentionally secondary to the three projects above so the strongest work remains easy to find.
Collaborative NumPy-equivalent for ARMv8-A. My contribution focused on the SME Matrix Acceleration module and Virtualization Helpers. Cross-compiled to AArch64 with CMake; all 109 tests passing.
Priority-aware LPG cylinder allocation platform with shortage handling, anti-starvation ageing, crisis-mode logic, FastAPI, MySQL, and QR-based consumer tracking.
↗ View repositoryNeural-network training components implemented from scratch to study backpropagation, optimization algorithms, and layer behavior beyond framework-level usage.
↗ View repositoryHigh-performance Entity Component System in C++ using contiguous memory layouts and sparse sets for cache-friendly entity management and fast iteration.
↗ View repositoryInteractive relation analyzer covering properties, closures, Hasse diagrams, and function analysis, backed by a C++ engine compiled to WebAssembly for browser execution.
↗ View repositoryFocused on the technologies that support my current work rather than a long list of tools.
Model execution, quantization, attention-state optimization, inference graphs, and empirical evaluation.
Native runtimes, SIMD, Python/C++ interop, memory locality, and architecture-aware optimization.
APIs, data storage, reproducible experimentation, and interfaces for ML systems.
I learn best by moving between theory, implementation, and measurement.
My main interest is inference-time efficiency: kernel fusion, memory bandwidth, SIMD, quantization, cache behavior, and execution overhead across GPU and CPU systems.
I prefer to build a working system, profile it, identify the bottleneck, and then study the underlying mechanism. Projects are useful to me because they turn performance claims into something measurable.
I want to work on ML systems, inference runtimes, AI compilers, GPU programming, and efficient deployment — especially software that closes the gap between theoretical model capability and practical hardware performance.
I am a third-year CSE student at JSS Academy of Technical Education, Bengaluru. I am currently open to research collaborations, internships, and technical conversations around inference systems and performance engineering.
Kept compact so the technical work remains the center of the portfolio.
Built and presented the priority-aware LPG allocation system end-to-end under competition constraints.
Competitive prompt-design event focused on reasoning, context use, and structured LLM interaction.
Embedded-systems technical quiz covering architecture, RTOS concepts, memory-mapped I/O, and interrupts.
I'm open to research collaborations, internship opportunities, and conversations about LLM inference, performance engineering, GPU kernels, or CPU runtimes.